1. Field of the Invention
The present invention relates generally to a fabrication process for a semiconductor device. More specifically, the invention relates to a method for forming an interlayer insulation layer in a semiconductor device having multilevel interconnection,
2. Description of the Related Art
Associated with increasing of package density in a semiconductor device, it becomes essential to employ multilevel interconnection in the fabrication of the semiconductor device. As interlayer insulation layer of the multilevel interconnection in the semiconductor devices, silicon oxide type insulation layer has been primarily employed for the purpose reduction of parasitic capacitance between wirings, such as between an upper level wiring and a lower level wiring and so forth. Due to increasing package density, the gap between the wirings in the lower level wiring is reduced to provide higher aspect ratio (film thickness of the lower level wiring (=height of the lower level wiring/gap between wiring in the lower level wiring) between the wiring. Therefore, in past processes of formation of the interlayer insulation layer, it has been required that the surface of the interlayer insulation layer is smooth enough and the gap fill capability of the interlayer insulation layer between the wiring in the lower level wiring is higher. Furthermore, in order to reduce parasitic capacitance between the upper level wiring and the lower level wiring, it is preferable to have thicker interlayer insulation layer above the upper surface of the lower level wiring. As the conventional method for forming the interlayer insulation layer satisfying such requirement, there are two ways, i.e. a method employing an SOG layer and a method of reflow of PSG layer or BPSG layer.
The method of reflow of BPSG layer and so forth may be employed in the case where the lower level wiring is formed of polycrystalline silicon film, refractory metal film, refractory metal silicide film or refractory metal polycide film, but is not applicable in the case where the lower wiring is formed of aluminum or its alloy, copper or copper alloy or gold or gold alloy. The necessary temperature for performing reflow is approximately 800.degree. C. at the lowest. When the primary material of the lower level wiring is aluminum type metal, the temperature to perform reflow is higher than the melting point of the aluminum type metal. On the other hand, when the primary material of the lower level wiring is copper or gold, the melting points of the copper and gold are higher than the required temperature for performing reflow. However, in these cases, the lower level wiring becomes a stacked metal film, in which barrier metal films are provided at upper and lower sides of the copper or gold film. At the required temperature, thermal diffusion of copper and gold cannot be restricted by the barrier metal films in the case of the stacked metal film.
With respect to the case where the primary material of the lower level wiring is aluminum type metal, the conventional method employing the SOG film will be discussed briefly for facilitating better understanding of the invention, which will be discussed later.
At first, necessary semiconductor elements are formed on the surface of a semiconductor substrate. Thereafter, a BPSG film, for example, is deposited over the entire surface. By reflowing the BPSG film, an undercoat insulation layer is formed. Through the undercoat insulation layer, necessary contact holes are formed. Thereafter, by sequential sputtering of a titanium film, a titanium nitride film (or tungsten nitride film), aluminum-copper-silicon alloy film and titanium nitride film (or tungsten nitride film), a stacked metal film having 800 nm of film thickness is formed. By performing patterning for the stacked metal film in a known method, a plurality of lower level wiring are formed. A minimum gap between these lower level wiring is 0.4 .mu.m. At such portion, an aspect ratio of the gap portion between two lower level wiring becomes approximately 2. At this time, the lower level wiring and the undercoat insulation layer have tensile stress and compressive stress, respectively, relative to a silicon substrate.
Next, the surface of the undercoat insulation layer including the lower level wiring is covered with a silicon oxide layer of approximately 200 nm of layer thickness by chemical vapor deposition. It should be noted that the layer thickness becomes 200 nm at the portion directly covering the upper surface of the lower level wiring and the upper surface of the undercoat insulation layer but becomes 100 to 150 nm at the portion covering the side surface of the lower level wiring. Therefore, the aspect ratio of the above-mentioned gap covered with the silicon oxide layer becomes 4 to 8. Since the growth temperature in chemical vapor deposition is limited by the component of the lower level wiring and thus is merely 450.degree. C. Also, as the chemical vapor deposition method, a plasma chemical vapor deposition is preferred in view of matching ability with the stress on the undercoat insulation layer and of step coverage ability for the lower level wiring. At this time, the silicon oxide layer has a compressive stress on the order of 1.times.10.sup.8 Pa.
Next, a solution containing poly silicic acids (nSiO.sub.2.m(H.sub.2 O) (here, molecular weight is 1000 g/mol, n is approximately 30 to 40, m is one of the values of n-2, n-1, n and n+1) as a primary element and an organic solvent is applied onto the surface of the silicon oxide later under rotation at 5000 r.p.m. for example. Subsequently, at a temperature approximately 150.degree. C., pre-baking is performed for about one minute to remove the solvent. By this process, the surface of the silicon oxide layer can be covered with SOG film. The film thickness of this SOG film is merely 200 nm at the position above the upper surface of the lower level wiring. At this time, the gap portion having the aspect ratio of 4 to 8 is also filled with the SOG film completely. At this step, the SOG film contains a large amount of silanol bond (Si--OH). Subsequently, heat treatment at a temperature approximately 300.degree. C. is performed for about 30 minutes. By this heat treatment, dehydrogenation is caused in the SOG film (one molecule of H.sub.2 O is separated from two silanol bond) so that most of silanol bond is converted into siloxane bond (Si--O--Si). The thermally processed (inorganic) SOG film has the tensile stress on the order to 1.times.10.sup.8 Pa.
While thick organic type SOG film may be formed when an organic solvent containing polysiloxanes ((SiR.sub.2 O).sub.n) as the primary component, it is not desirable to retain such organic type SOG film since alkyl group resides in such organic type SOG film.
Subsequently, as required, the foregoing SOG film formation process is repeated on the order of one to three times. Subsequently, by performing etching of the SOG film by way of anisotropic etching to form an interlayer insulation layer of silicon oxide with substantially smooth surface with maintaining the SOG film within the gap portion. Furthermore, if required, a second silicon oxide layer is formed over the entire surface by way of chemical vapor deposition method. Then, a via hole reaching the lower level wiring is formed. Subsequently, the upper level wiring of aluminum or aluminum alloy is formed. Thus, the semiconductor device is fabricated.
However, in the case of the method for forming the interlayer insulation layer employing (inorganic type) SOG film taking poly silicic acids as starting material, heat treatment at a temperature on the order of 300.degree. C. becomes necessary for covering silanol bond to siloxane bond. By dehydrogenation by heat treatment, shrinkage of volume is caused in the thermally processed SOG film by more than or equal to 20% in comparison with the volume of the SOG film before heat treatment. The thermally processed SOG film has a network structure by the siloxane bond. However, not all of silanol bond can be converted into siloxane bond by the heat treatment. Therefore, the network structure of the (inorganic type) SOG film has high possibility to be terminated at the silanol bond which is hydrophilic radical. Also, as set forth above, the SOG film after heat treatment has high tensile stress.
Therefore, the conventional method for forming the interlayer insulation layer employing the SOG film, as set forth above, encounters the following problems. At first, as set out above, the thermally processed SOG film causes a large amount of shrinkage in volume in comparison with the SOG film immediately after pre-baking. When the film thickness of the SOG film becomes 150 to 200 nm, cracks and voids tends to be caused to degrade smoothness of the surface of the interlayer insulation layer and gap fill at the gap portion. As a result, breakage of upper level wiring, shorting between wiring in the upper level wiring or between the upper level wiring and the lower level wiring, degradation of migration resistance of the upper level wiring and so forth can be caused. The practically useful film thickness of the SOG film formed through one process step is merely on the order of 100 nm. Therefore, in order to certainly obtain sufficient thickness of the interlayer insulation layer with the SOG film, the foregoing process has to be repeated for a plurality of times making the fabrication process long.
Next, since the thermally processed SOG film has high tensile stress and has high possibility to terminate the network structure at silanol bond as hydrophilic radical, the SOG film tends to relax the stress by absorbing water. As a result of this, humidity resistance of the upper level wiring (or lower level wiring) can be degraded.
A method for forming the interlayer insulation layer employing new SOG film for solving the problems set forth above, has been reported in Paper of VLSI Multilevel Interconnection Conference, 1992, pp 180 to 186. The reported method is as follows:
At first, the undercoat insulation layer covering the entire surface of the semiconductor substrate is formed. Then, after forming lower level wiring with aluminum film, a solution containing hydrogen silsesquioxane ((HSiO.sub.3/2).sub.n) as the primary component is applied over the entire surface. After pre-baking at 150.degree. C., heat treatment is performed at 200.degree. C. for 60 seconds, at 300.degree. C. for 60 seconds and 450.degree. C. for 15 minutes to form a new SOG film.
The characteristics of this new SOG is as follows. The molecular weight of the starting material of this SOG is sufficiently larger than the molecular weight of the poly silicic acids as the starting material of the conventional inorganic SOG film. Therefore, it becomes possible to make the film thickness thicker in comparison with the conventional inorganic type SOG film. This SOG film has a property to cause glass transition at a temperature approximately 200.degree. C. This SOG film has siloxane network terminating at Si--H bond, which is a hydrophobic radical. Therefore, it has superior water-proofing characteristics over the conventional SOG film.
The inventors have performed supplementary experiments of formation of the interlayer insulation layer with the new SOG film according to the report. After final heat treatment, the volume shrinkage ratio of this SOG film was approximately 4%. The SOG had tensile stress comparable (1.times.10.sup.8 Pa) with the conventional inorganic type SOG film formed from poly silicic acids as the starting material.
Through the supplementary experiments, it has become clear that while the film thickness of the SOG film can be made thicker than the inorganic SOG film made of poly silicic acid as the starting material, occurrence of cracks becomes substantial when the film thickness reaches about 500 nm. Occurrence of such cracks and so forth is caused by relaxation of stress similarly to the conventional inorganic type SOG film. However, different from the conventional inorganic SOG film, it does not accompany substantial water absorption characteristics.